ARMv8 Micro-architectural Design Space Exploration for High Performance Computing using Fractional Factorial

Roxana Rusitoru

Energy-efficient Exascale computing provides new challenges for HPC hardware and software designers as we push to achieve this within the 20MW power limit. As this opportunity for innovation emerged, the HPC industry turned its focus towards traditionally-oriented embedded and low-power mobile market solutions, such as the ARM-based chips. Having been designed to achieve high energy efficiency within a small power footprint, ARM cores have the potential of being the basis of future Exascale systems.

Within this study, we perform a design space exploration on ARMv8 in-order and out-of-order core configurations to determine the sensitivities of HPC applications with respect to micro-architectural changes. We present the successful application of previously-introduced methodologies to an HPC environment. To achieve this, we use a suite of mini-applications and benchmarks, and we show that most applications are latency, and not throughput, bound.