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Research Report CS-RR-300

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T. Janowski, Bisimulation and Fault-Tolerance (February 1, 1996).

Abstract

In the area of concurrent, communicating systems, a common approach to verify the absence of design faults is in terms of an equivalence relation between a high-level and a low-level process. One such relation is bisimulation and this holds if two processes cannot be distinguished by observing them for a finite interval of time. However, the absence of design faults does not guarantee that the process will behave correctly in practice as it depends on various hardware devices which may be subject to physical faults themselves. Such faults cannot be avoided; they must be tolerated. The purpose of this thesis is to provide a formal framework, based on bisimulations and using the Calculus of Communicating Systems, by which we can specify, design and verify concurrent, fault-tolerant systems, with emphasis placed on reasoning and design under weak assumptions about faults.

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